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3.0 kv rms/3.75 kv rms triple-channel digital isolators data sheet adum130d / adum130e / adum131d / adum131e rev. a document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2015 analog devices, inc. all rights reserved. technical support www.analog.com features high common-mode transient immunity: 100 kv/s high robustness to radiated and conducted noise low propagation delay: 13 ns maximum for 5 v operation, 15 ns maximum for 1.8 v operation 150 mbps maximum guaranteed data rate safety and regulatory approvals (pending) ul recognition 3000 v rms/3750 v rms for 1 minute per ul 1577 csa component acceptance notice 5a vde certificate of conformity din v vde v 0884-10 (vde v 0884-10):2006-12 v iorm = 849 v peak cqc certification per gb4943.1-2011 backward compatibility adum130e1 / adum131e1 pin-compatible with adum1300 / adum1301 low dynamic power consumption 1.8 v to 5 v level translation high temperature operation: 125c fail-safe high or low options 16-lead, rohs compliant, soic package applications general-purpose multichannel isolation serial peripheral interface (spi)/data converter isolation industrial field bus isolation general description the adum130d / adum130e / adum131d / adum131e 1 are triple-channel digital isolators based on analog devices, inc., i coupler? technology. combining high speed, complementary metal-oxide semiconductor (cmos) and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler devices and other integrated couplers. the maximum propagation delay is 13 ns with a pulse width distortion of less than 3 ns at 5 v operation. channel matching is tight at 3.0 ns maximum. the adum130d / adum130e / adum131d / adum131e data channels are independent and are available in a variety of config- urations with a withstand voltage rating of 3.0 kv rms or 3.75 kv rms (see the ordering guide). the devices operate with the supply voltage on either side ranging from 1.8 v to 5 v, prov- iding compatibility with lower voltage systems as well as enabling voltage translation functionality across the isolation barrier. functional block diagrams encode decode encode decode encode decode v dd1 gnd 1 v ia v ib v ic nic disable 1 gnd 1 v dd2 gnd 2 v oa v ob v oc nic nic gnd 2 nic = no internal connection. leave this pin floating. 13348-001 16 15 14 13 12 11 10 1 2 3 4 5 6 7 9 8 adum130d figure 1. adum130d functional block diagram encode decode encode decode encode decode v dd1 nic = no internal connection. leave this pin floating. 16 15 14 13 12 11 10 1 2 3 4 5 6 7 9 8 adum130e 13348-002 gnd 1 v ia v ib v ic nic nic gnd 1 v dd2 gnd 2 v oa v ob v oc nic v e2 gnd 2 figure 2. adum130e functional block diagram encode decode encode decode decode encode v dd1 gnd 1 v ia v ib v oc nic disable 1 gnd 1 v dd2 gnd 2 v oa v ob v ic nic disable 2 gnd 2 nic = no internal connection. leave this pin floating. 13348-101 16 15 14 13 12 11 10 1 2 3 4 5 6 7 9 8 adum131d figure 3. adum131d functional block diagram encode decode encode decode decode encode v dd1 nic = no internal connection. leave this pin floating. 16 15 14 13 12 11 10 1 2 3 4 5 6 7 9 8 adum131e gnd 1 v ia v ib v oc v e1 nic gnd 1 v dd2 gnd 2 v oa v ob v ic nic v e2 gnd 2 13348-102 figure 4. adum131e functional block diagram unlike other optocoupler alternatives, dc correctness is ensured in the absence of input logic transitions. two different fail-safe options are available, in which the outputs transition to a pre- determined state when the input power supply is not applied or the inputs are disabled. the adum130e1 / adum131e1 are pin- compatible with the adum1300 / adum1301. 1 protected by u.s. patents 5,952,849; 6,873,065; 6, 903,578; and 7,075,329. other patents are pending.
adum130d/adum130e/ad um131d/adum131e data sheet rev. a | page 2 of 22 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagrams ............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? electrical characteristics5 v operation................................ 3 ? electrical characteristics3.3 v operation ............................ 4 ? electrical characteristics2.5 v operation ............................ 6 ? electrical characteristics1.8 v operation ............................ 7 ? insulation and safety related specifications ............................ 9 ? package characteristics ............................................................... 9 ? regulatory information ............................................................. 10 ? din v vde v 0884-10 (vde v 0884-10) insulation characteristics ............................................................................ 11 ? recommended operating conditions .................................... 12 ? absolute maximum ratings ......................................................... 13 ? esd caution................................................................................ 13 ? truth tables................................................................................. 14 ? pin configurations and function descriptions ......................... 15 ? typical performance characteristics ........................................... 17 ? applications information .............................................................. 18 ? overview ..................................................................................... 18 ? printed circuit board (pcb) layout ....................................... 18 ? propagation delay related parameters ................................... 19 ? jitter measurement ..................................................................... 19 ? insulation lifetime ..................................................................... 19 ? outline dimensions ....................................................................... 21 ? ordering guide .......................................................................... 22 ? revision history 11/15rev. 0 to rev. a added 16-lead, narrow body soic package ................ universal changes to title, features section, and general description section ................................................................................................ 1 added table 9; renumbered sequentially .................................... 9 changes to table 10 and table 11 .................................................. 9 added table 12 ............................................................................... 10 changes to table 13 ........................................................................ 10 changes to table 15 title ............................................................... 12 added figure 5; renumbered sequentially ................................ 12 changes to table 17 and table 19 ................................................ 13 added table 18 ............................................................................... 13 updated outline dimensions ....................................................... 21 changes to ordering guide .......................................................... 22 7/15revision 0: initial version
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 3 of 22 specifications electrical character istics 5 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 5 v. m inimum/maximum specifications apply over the entire recommended operation range of 4.5 v v dd1 5.5 v, 4.5 v v dd2 5.5 v, and ? 40c t a + 125c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal lev els, unless otherwise noted. supply currents are specified with 50% duty cycle signals. table 1 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pulse width distortion (pwd) limit data rate 1 150 mbps within pwd limit propagation delay t phl , t plh 4.8 7.2 13 ns 50% input to 50% output pulse width distortion pwd 0.5 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/c propagation delay skew t psk 6.1 ns between any two devices at the same temperature, voltage, and load channel matching codirectional t pskcd 0.5 3.0 ns opposing direction t pskod 0.5 3.0 ns jitter 630 p s p -p s ee the jitter measurement section 8 0 p s rms s ee the jitter measurement section dc specifications input threshold logic high v ih 0.7 v dd x v logic low v il 0.3 v ddx v output voltage logic high v oh v ddx ? 0.1 v ddx v i ox 2 = ?20 a, v ix = v ixh 3 v ddx ? 0.4 v ddx ? 0.2 v i ox 2 = ?4 ma, v ix = v ixh 3 logic low v ol 0.0 0.1 v i ox 2 = 20 a, v ix = v ixl 4 0.2 0.4 v i ox 2 = 4 ma, v ix = v ixl 4 input current per channel i i ?10 +0.01 +10 a 0 v v ix v ddx v e 2 enable input pull - up current i pu ?10 ?3 a v e2 = 0 v disable 1 input pull - down current i pd 9 15 a disable 1 = v ddx tristate output current per channel i oz ?10 +0.01 +10 a 0 v v ox v ddx quiescent supply current adum13 0d / adum130e i dd 1 (q) 1.35 2.6 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 2 (q) 1.73 2.9 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 1 (q) 9.7 15.2 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 i dd 2 (q) 1.87 3.0 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 adum131d / adum131e i dd 1 (q) 1.62 2.7 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 2 (q) 1.61 2.8 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 1 (q) 7.4 11.4 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 i dd 2 (q) 5.34 7.2 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynamic output i ddo (d) 0.02 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v
adum130d/adum130 e/adum131d/adum131e data sheet rev. a | page 4 of 22 parameter symbol min typ max unit test conditions/comments ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 7 |cm h | 75 100 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 150 mbps is the highest data rate that can be guaranteed, although higher data rates are possible. 2 i ox is t he cha nnel x output current, where x = a, b, or c. 3 v ixh is the input side logic high. 4 v ixl is the input side logic low. 5 v i is the voltage input. 6 e0 refers to the adum130e0 / adum131e0 model s , d0 refers to the adum130d0 / adum131d0 model s , e1 refers to the adum130e1 / adum131e1 model s , and d1 refers to the adum130d1 / adum131d1 model s . see the ordering guide section. 7 |cm h | is the maximum common - mode voltage slew rate that can be sustained while maintaining the voltage output (v o ) > 0.8 v ddx . |cm l | is the maximum common - mode voltage slew rate th at can be sustained while maintaining v o x > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. table 2 . total supply current vs. data throughput 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current adum13 0d / adum130e su pply current side 1 i dd1 5.6 9.0 6.3 9.8 9.4 14.3 ma supply current side 2 i dd2 1.9 3.7 3.1 4.9 6.8 10 ma adum131d / adum131e supply current side 1 i dd1 4.6 7.2 5.5 8.3 8.8 11.9 ma supply current side 2 i dd2 3.6 5.8 4.6 6.8 8.0 11.3 ma electrical character istics 3.3 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 3.3 v. minimum/maximum specifications apply over the entire recommended operation range: 3.0 v v dd1 3.6 v, 3.0 v v dd2 3.6 v, and ? 40c t a + 125c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply curr ents are specified with 50% duty cycle signals. table 3 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pwd limit data rate 1 150 mbps within pwd limit propagation delay t phl , t plh 4.8 6.8 14 ns 50% input to 50% output pulse width distortion pwd 0.7 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/ c propagation delay skew t psk 7.5 ns between any two devices at the same temperature, voltage, and load channel matching codirectional t pskcd 0.7 3.0 ns opposing direction t pskod 0.7 3.0 ns jitter 640 ps p -p s ee the jitter measurement section 75 ps rms s ee the jitter measurement section dc specifications input threshold logic high v ih 0.7 v ddx v logic low v il 0.3 v ddx v
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 5 of 22 parameter symbol min typ max unit test conditions/comments output voltage logic high v oh v ddx ? 0.1 v ddx v i ox 2 = ?20 a, v ix = v ixh 3 v ddx ? 0.4 v ddx ? 0.2 v i ox 2 = ?2 ma, v ix = v ixh 3 logic low v ol 0.0 0.1 v i ox 2 = 20 a, v ix = v ixl 4 0.2 0.4 v i ox 2 = 2 ma, v ix = v ixl 4 input current per channel i i ?10 +0.01 +10 a 0 v v ix v ddx v e 2 enable input pull - up current i pu ?10 ?3 a v e 2 = 0 v disable 1 input pull - down current i pd 9 15 a disable 1 = v ddx tristate output current per channel i oz ?10 +0.01 +10 a 0 v v ox v ddx quiescent supply current adum13 0d / adum130e i dd 1 (q) 1.25 2.5 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 2 (q) 1.65 2.8 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 1 (q) 9.57 15.0 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 i dd 2 (q) 1.79 2.9 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 adum131d / adum131e i dd 1 (q) 1.52 2.6 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 2 (q) 1.52 2.6 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 1 (q) 7.28 11.3 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 i dd 2 (q) 5.24 7.1 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynamic output i ddo (d) 0.01 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 7 |cm h | 75 100 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 150 mbps is the highest data rate that can be guaranteed, although higher data rates are possible. 2 i ox is t he channel x outp ut current , where x = a, b, or c. 3 v ixh is the input side logic high. 4 v ixl is the input side logic low. 5 v i is the voltage input. 6 e0 refers to the adum130e0 / adum131e0 model s , d0 refers to the adum130d0 / adum131d0 model s , e1 refers to the adum130e1 / adum131e1 model s , and d1 refers to the adum130d1 / adum131d1 model s. see the ordering guide section. 7 |cm h | is the maximum common - mode voltage slew rate that can be sustained while maintaining the voltage output (v o ) > 0.8 v ddx . |cm l | is the maximum common - mode voltage slew rate that can be sustained while maintaining v o x > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. table 4 . total supply current vs. data throughput 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current adum13 0d / adum130e supply current side 1 i dd1 5.4 8.8 6.0 9.4 8.5 12.7 ma supply current side 2 i dd2 1.8 3.6 2.9 4.7 6.2 8.4 ma adum131d / adum131e supply current side 1 i dd1 4.4 7.1 5.2 8.0 8.1 10.7 ma supply current side 2 i dd2 3.4 5.6 4.3 6.5 7.4 9.5 ma
adum130d/adum130 e/adum131d/adum131e data sheet rev. a | page 6 of 22 electrical character istics 2.5 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 2.5 v. minimum/maximum specifications apply over the entire recommended operation range: 2.25 v v dd1 2.75 v, 2.25 v v dd2 2.75 v, ? 40c t a + 125c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply curr ents are specified with 50% duty cycle signals. table 5 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pwd limit data rate 1 150 mbps within pwd limit propagation delay t phl , t plh 5.0 7.0 14 ns 50% input to 50% output pulse width distortion pwd 0.7 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/ c propagation delay skew t psk 6.8 ns between any two devices at the same temperature, voltage, load channel matching codirectional t pskcd 0.7 3.0 ns opposing direction t pskod 0.7 3.0 ns jitter 770 ps p -p s ee the jitter measurement section 160 ps rms s ee the jitter measurement section dc specifications input threshold logic high v ih 0.7 v ddx v logic low v il 0.3 v ddx v output voltage logic high v oh v ddx ? 0.1 v ddx v i ox 2 = ?20 a, v ix = v ixh 3 v ddx ? 0.4 v ddx ? 0.2 v i ox 2 = ?2 ma, v ix = v ixh 3 logic low v ol 0.0 0.1 v i ox 2 = 20 a, v ix = v ixl 4 0.2 0.4 v i ox 2 = 2 ma, v ix = v ixl 4 input current per channel i i ?10 +0.01 +10 a 0 v v ix v ddx v e 2 enable input pull - up current i pu ?10 ?3 a v e 2 = 0 v disable 1 input pull - down current i pd 9 15 a disable 1 = v ddx tristate output current per channel i oz ?10 +0.01 +10 a 0 v v ox v ddx quiescent supply current adum13 0d / adum130e i dd 1 (q) 1.2 2.4 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 2 (q) 1.61 2.7 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 1 (q) 9.52 14.9 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 i dd 2 (q) 1.76 2 .8 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 adum131d / adum131e i dd 1 (q) 1.47 2.5 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 2 (q) 1.48 2.5 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 1 (q) 7.23 11.2 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 i dd 2 (q) 5.19 7.0 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynamic output i ddo (d) 0.01 ma/mbps inputs switching, 50% duty cycle undervoltage lockout positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 7 of 22 parameter symbol min typ max unit test conditions/comments ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 7 |cm h | 75 100 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 150 mbps is the highest data rate that can be guaranteed, a lthough higher data rates are possible. 2 i ox is t he channe l x o utput current , where x = a, b, or c. 3 v ixh is the input side logic high. 4 v ixl is the input side logic low. 5 v i is the voltage input. 6 e0 refers to the adum130e0 / adum131e0 model s , d0 refers to the adum130d0 / adum131d0 model s , e1 refers to the adum130e1 / adum131e1 model s , and d1 refers to the adum130d1 / adum131d1 model s . see th e ordering guide section. 7 |cm h | is the maximum common - mode voltage slew rate that can be sustained while maintaining the voltage output (v o ) > 0.8 v ddx . |cm l | is the maximum common - mode voltage slew rate th at can be sustained while maintaining v o x > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. table 6 . total supply current vs. data throughput 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current adum130e / adum13 0d supply current side 1 i dd1 5.3 8.7 5.9 9.3 8.2 12.3 ma supply current side 2 i dd2 1.8 3.6 2.6 4.4 5.2 7.4 ma adum131e / adum131d supply current side 1 i dd1 4.4 7.1 5.0 7.8 7.5 10.1 ma supply current side 2 i dd2 3.4 5.6 4.1 6.3 6.6 8.7 ma electrical character istics 1.8 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 1.8 v. minimum/maximum specifications apply over the entire recommended operation range: 1.7 v v dd1 1.9 v, 1.7 v v dd2 1.9 v, and ? 40c t a + 125c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply curr ents are specified with 50% duty cycle signals. table 7 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pwd limit data rate 1 150 mbps within pwd limit propagation delay t phl , t plh 5.8 8.7 15 ns 50% input to 50% output pulse width distortion pwd 0.7 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/ c propagation delay skew t psk 7.0 ns between any two devices at the same temperature, voltage, and load channel matching codirectional t pskcd 0.7 3.0 ns opposing direction t pskod 0.7 3.0 ns jitter 600 ps p -p s ee the jitter measurement section 9 0 ps rms s ee the jitter measurement section dc specifications input threshold logic high v ih 0.7 v ddx v logic low v il 0.3 v ddx v output voltage logic high v oh v ddx ? 0.1 v ddx v i ox 2 = ?20 a, v ix = v ixh 3 v ddx ? 0.4 v ddx ? 0.2 v i ox 2 = ?2 ma, v ix = v ixh 3
adum130d/adum130 e/adum131d/adum131e data sheet rev. a | page 8 of 22 parameter symbol min typ max unit test conditions/comments logic low v ol 0.0 0.1 v i ox 2 = 20 a, v ix = v ixl 4 0.2 0.4 v i ox 2 = 2 ma, v ix = v ixl 4 input current per channel i i ?10 +0.01 +10 a 0 v v ix v ddx v e 2 enable input pull - up current i pu ?10 ?3 a v e 2 = 0 v disable 1 input pull - down current i pd 9 15 a disable 1 = v ddx tristate output current per channel i oz ?10 +0.01 +10 a 0 v v ox v ddx quiescent supply current adum13 0d / adum130e i dd 1 (q) 1.15 2.3 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 2 (q) 1.58 2.6 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 1 (q) 9.41 14.8 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 i dd 2 (q) 1.72 2. 7 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 adum131d / adum131e i dd 1 (q) 1.42 2.4 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 2 (q) 1.44 2.4 ma v i 5 = 0 (e0, d0), 1 (e1, d1) 6 i dd 1 (q) 7.15 11.1 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 i dd 2 (q) 5.13 6.9 ma v i 5 = 1 (e0, d0), 0 (e1, d1) 6 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynamic output i ddo (d) 0.01 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 7 |cm h | 75 100 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 150 mbps is the highest data rate that can be guaranteed, although higher data rates are possible. 2 i ox is t he channel x o utput current , where x = a, b, or c. 3 v ixh is the input side logic high. 4 v ixl is the input side logic low. 5 v i is the voltage input. 6 e0 refers to the adum130e0 / adum131e0 model s , d0 refers to the adum130d0 / adum131d0 model s , e1 refers to the adum130e1 / adum131e1 model s , and d1 refers to the adum130d1 / adum131d1 model s . see the ordering guide section. 7 |cm h | is the maximum common - mode voltage slew rate that can be sustained while maintaining the voltage output (v o ) > 0.8 v ddx . |cm l | is the maximum common - mode voltage slew rate th at can be sustained while maintaining v ox > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. table 8 . total supply current vs. data throughput 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current adum13 0d / adum130e supply current side 1 i dd1 5.2 8.6 5.8 9.3 8.1 12.2 ma supply current side 2 i dd2 1.7 3.5 2.5 4.3 5.2 7.3 ma adum131d / adum131e supply current side 1 i dd1 4.3 7.0 4.9 7.7 7. 2 6 10.0 ma supply current side 2 i dd2 3.3 5.5 4.0 6.2 6.5 8.6 ma
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 9 of 22 insulation and safet y related specificat ions for additional information, see www.analog.com/icouplersafety . ta ble 9 . r - 16 narrow body [soic_n] package parameter symbol value unit test conditions/comments rated dielectric insulation voltage 300 0 v rms 1 - minute duration minimum external air gap (clearance) l (i01) 4.0 mm min measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l (i02) 4.0 mm min measured from input terminals to output terminals, shortest distance path along body minimum clearance in the plane of the printed circuit board (pcb clearance) l (pcb) 4.5 mm min measured from input terminals to output terminals, shortest distance through air, line of sight, in the pcb mounting plane minimum internal gap (internal clearance) 25.5 m min insulation distance through insulation tracking resistance (comparative tracking index) cti >400 v din iec 112/vde 0303 part 1 material group ii material group (din vde 0110, 1/89, table 1) table 10. rw - 16 wide body [soic_w] package parameter symbol value unit test conditions/comments rated dielectric insulation voltage 3750 v rms 1 - minute duration minimum external air gap (clearance) l (i01) 7.8 mm min measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l (i02) 7.8 mm min measured from input terminals to output terminals, shortest distance path along body minimum clearance in the plane o f the printed circuit board (pcb clearance) l (pcb) 8.1 mm min measured from input terminals to output terminals, shortest distance through air, line of sight, in the pcb mounting plane minimum internal gap (internal clearance) 25.5 m min insulation distance through insulation tracking resistance (comparative tracking index) cti >400 v din iec 112/vde 0303 part 1 material group ii material group (din vde 0110, 1/89, table 1) package characterist ics table 11. parameter symbol min typ max unit test conditions/comments resistance (input to output) 1 r i- o 10 13 ? capacitance (input to output) 1 c i- o 2.2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction to ambient thermal resistance r - 16 narrow body [soic_n] package ja 76 c/w thermocouple located at center of package underside rw - 16 wide body [soic_w] package ja 45 c/w thermocouple located at center of package underside 1 the device is considered a 2 - terminal device: pin 1 through pin 8 are shorted together, and pin 9 through pi n 16 are shorted together. 2 input capacitance is from any input data pin to ground.
adum130d/adum130 e/adum131d/adum131e data sheet rev. a | page 10 of 22 regulatory informati on see table 19 and the insulation lifetime section for details regarding recommended maximum working voltages for sp ecific cross - isolation waveforms and insulation levels. table 12. r- 16 narrow body [soic_n] package ul (pending) csa (pending) vde (pending) cqc (pending) recognized under ul 1577 component recognition program 1 approved under csa component acceptance notice 5a certified according to din v vde v 0884 - 10 (vde v 0884 - 10):2006 - 12 2 certified under cqc11 - 471543- 2012 single protection, 3000 v rms isolation voltage csa 60950 -1 - 07+a1+a2 and iec 60950 - 1, second edition, +a1+a2 : reinforced insulation, v iorm = 565 v peak, v iosm = 6000 v peak gb4943.1 - 2011 : double protection, 3000 v rms isolation voltage basic insulation at 400 v rms (565 v peak) basic insulation, v iorm = 565 v peak, v iosm = 10 kv peak basic insulation at 770 v rms (1089 v peak) reinforced insulation at 200 v rms (283 v peak) reinforced insulation at 385 v rms (545 v peak) i ec 60601 - 1 edition 3.1: basic insulation (one means of patient protection (1 mopp)), 250 v rms (354 v peak) t ropical climate, altitude 5000 m csa 61010 - 1 - 12 and iec 61010 - 1 third edition : basic ins ulation at 300 v rms mains, 400 v rms secondary (565 v peak) reinforced insulation at 300 v rms mains, 200 v secondary (282 v peak) file e214100 file 205078 file 2471900 - 4880 - 0001 file (pending) 1 in accordance with ul 1577, each adum130d / adum130e / adum131d / adum131e in the r - 16 n arrow b ody [soic_n] p ackage is proof tested by applying an insulation test voltage 3600 v rms for 1 sec. 2 in accordance with din v vde v 0884 - 10, each adum130d / adum130e / adum131d / adum131e in the r - 16 n arrow b ody [soic_n] p ackage is proof tested by apply ing an insulation test voltage 1059 v peak for 1 sec (partial discharge detection limit = 5 pc). the * marking branded on the comp onent designates din v vde v 0884 - 10 approval. table 13. rw - 16 wide body [soic_w] package ul (pending) csa (pending) vde (pending) cqc (pending) recognized under ul 1577 component recognition program 1 approved under csa component acceptance notice 5a certified according to din v vde v 0884 - 10 (vde v 0884 - 10):2006 -12 2 certified under cqc11 - 471543- 2012 single protection, 3750 v rms isolation voltage csa 60950 - 1 - 07+a1+a2 and iec 60950 - 1 , second edition, +a1+a2 : reinforced insulation, v iorm = 849 v peak, v iosm = 6000 v peak gb4943.1 - 2011 double protection, 3750 v rms isolation voltage basic insulation at 780 v rms (1103 v peak) basic insulation, v iorm = 849 v peak, v iosm = 10 kv peak basic insulation at 780 v rms (1103 v peak) reinforced insulation at 390 v rms (552 v peak) reinforced insulation at 390 v rms (552 v peak) iec 60601 - 1 edition 3.1: b asic insulation (1 means of patient protection (mopp)), 490 v rms (693 v peak) t ropical climate, altitude 5000 m csa 61010 -1 - 12 and iec 61010 - 1 third edition: basic insulation at 300 v rms mains, 780 v secondary (1103 v peak) reinforced insulation at 300 v rms mains, 390 v secondary (552 v peak) file e214100 file 205078 file 2471900 - 4880 - 0001 file ( p ending) 1 in accordance with ul 1577, e ach adum13 0d / adum130e / adum131d / adum131e in the rw - 16 w ide b ody [soic_w] p ackage is proof tested by applying an insulation test voltage 450 0 v rms for 1 sec . 2 in accordance with din v vde v 0884 - 10 , each adum130d / adum130e / adum131d / adum131e in the rw - 16 w ide b ody [soic_w] p ackage is proof tested by applying an insulation test voltage 1592 v peak for 1 sec (partial discharge detection limit = 5 p c). the * marking branded on the component designates din v vde v 0884 - 10 approval.
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 11 of 22 din v vde v 0884 - 10 (vde v 0884 - 10) insulation character istics these isolators are suitable for reinforced electrical isolation only within the safety limit data. protective circuits ensur e the maintenance of the safety data. the * marking on packages denotes din v vde v 0884 - 10 approval. table 14. r - 16 narrow body [soic_n] package description test conditions/comments symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iv for rated mains voltage 600 v rms i to iii climatic classification 40/125/21 pollution degree per din vde 0110, table 1 2 maximum working insulation voltage v iorm 565 v peak input to output test voltage, method b1 v iorm 1.875 = v pd (m) , 100% production test, t ini = t m = 1 sec, partial discharge < 5 pc v pd (m) 1 059 v peak input to output test voltage, method a v pd (m) after environmental tests subgroup 1 v iorm 1.5 = v pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc 848 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc 678 v peak highest allowable overvoltage v iotm 4200 v peak surge isolation voltage basic v peak = 10 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 10 000 v peak surge isolation voltage reinforced v peak = 10 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 6000 v peak safety limiting values maximum value allowed in the event of a failure (se e figure 5 ) maximum junction temperature t s 150 c total power dissipation at 25c p s 1.64 w insulation resistance at t s v io = 500 v r s >10 9 ?
adum130d/adum130 e/adum131d/adum131e data sheet rev. a | page 12 of 22 table 15. rw - 16 wide body [soic_w] package description test conditions/comments symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iv for rated mains voltage 6 00 v rms i to iii climatic classification 40/125/21 pollution degree per din vde 0110, table 1 2 maximum working insulation voltage v iorm 849 v peak input to output test voltage, method b1 v iorm 1.875 = v pd (m) , 100% production test, t ini = t m = 1 sec, partial discharge < 5 pc v pd (m) 1592 v peak input to output test voltage, method a v pd (m) after environmental tests subgroup 1 v iorm 1.5 = v pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc 1274 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc 1019 v peak highest allowable overvoltage v iotm 530 0 v peak surge isolation voltage basic v peak = 12.8 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 1 2 ,000 v peak reinforced v peak = 10 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 6000 v peak safety limiting values maximum value allowed in the event of a failure (see figure 6 ) maximum junction temperature t s 150 c total power dissipation at 25c p s 2.78 w insulation resistance at t s v io = 500 v r s >10 9 ? 1.8 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 50 100 150 200 safe operating p vdd1 , p vdda or p vddb power (w) ambient temperature (c) 13348-202 figure 5 . thermal derating curve for r - 16 narrow body [soic_n] package, dependence of safety limiting values with ambient temperature per din v vde v 0884 - 10 3.0 2.5 2.0 1.5 0.5 1.0 0 0 200 150 100 50 safe limiting power (w) ambient temperature (c) 13348-003 0884 - 10 recommended operatin g conditions table 16. parameter symbol rating operating temperature t a ?40c to +125c supply voltages v dd1 , v dd2 1.7 v to 5.5 v input signal rise and fall times 1.0 ms
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 13 of 22 absolute maximum rat ings t a = 25c, unless otherwise noted. table 17. parameter rating storage temperature (t st ) range ?65c to +150c ambient operating temperature (t a ) range ?40c to +125c supply voltages (v dd1 , v dd2 ) ?0.5 v to +7.0 v input voltages (v ia , v ib , v ic , v e 1 , v e2 , disable 1 , disable 2 ) ?0.5 v to v ddi 1 + 0.5 v output voltages (v oa , v ob , v oc ) ?0.5 v to v ddo 2 + 0.5 v average output current per pin 3 side 1 output current (i o1 ) ?10 ma to +10 ma side 2 output current (i o2 ) ?10 ma to +10 ma common - mode transients 4 ?150 kv/s to +150 kv/s 1 v ddi is the input side supply voltage. 2 v ddo is the output side supply voltage. 3 see figure 5 for the r - 16 narrow body [soic_n] package or figure 6 for the rw - 16 wide body [soic_w] package for th e maximum rated current values for various ambient temperatures. 4 refers to the common - mode transients across the insulation barrier. common - mode transients exceeding the absolute maximum ratings may cause latch - up or permanent damage. stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditi ons for extended periods may affect product reliability. esd caution table 18. maximum continuous working voltage r - 16 narrow body [soic_n] package 1 parameter rating constraint 2 ac voltage bipolar waveform basic insulation 789 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 reinforced insulation 403 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 unipolar waveform basic insulation 909 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 reinforced insulation 469 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 dc voltage basic insulation 558 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 reinforced insulation 285 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 1 refers to the continuous voltage magnitude imposed across the isolation barrier. see the insulation lifetime section for more details. 2 insulation lifetime for the specified test condition is greater than 50 years. table 19. maximum continuous working voltage rw - 16 wide body [soic_w] package 1 parameter rating constraint 2 ac voltage bipolar waveform basic insulation 849 v peak 50- year minimum insulation lifetime reinforced insulation 768 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950- 1 unipolar waveform basic insulation 1698 v peak 50- year minimum insulation lifetime reinforced insulation 768 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950- 1 dc voltage basic insulation 1092 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 reinforced insulation 543 v peak lifetime limited by package creepage maximum approved working voltage per iec 60950 - 1 1 refers to the continuous voltage magnitude imposed across the isolation barrier. see the insulat ion lifetime section for more details. 2 insulation lifetime for the specified test condition is greater than 50 years.
adum130d/adum130e/ad um131d/adum131e data sheet rev. a | page 14 of 22 truth tables table 20. adum130d / adum131d truth table (positive logic) v ix input 1, 2 v disablex input 1, 2 v ddi state 2 v ddo state 2 default low (d0), v ox output 1, 2, 3 default high (d1), v ox output 1, 2, 3 test conditions/comments l l or nc powered powered l l normal operation h l or nc powered powered h h normal operation x h powered powered l h inputs disabled, fail-safe output x 4 x 4 unpowered powered l h fail-safe output x 4 x 4 powered unpowered indeterminate indeterminate 1 l means low, h means high, x means do nt care, and nc means not connected. 2 v ix and v ox refer to the input and output signals of a given channel (a, b, or c). v disablex refers to the input disable signal on the same side as the v ix inputs. v ddi and v ddo refer to the supply voltages on the input and output sides of the given channel, respectively. 3 e0 refers to the adum130e0 / adum131e0 models, d0 refers to the adum130d0 / adum131d0 models, e1 refers to the adum130e1 / adum131e1 models, and d1 refers to the adum130d1 / adum131d1 models. see the ordering guide section. 4 input pins (v ix , disable 1 , and disable 2 ) on the same side as an unpowered supply must be in a low state to avoid powering the device through its esd protection circuitry. table 21. adum130e / adum131e truth table (positive logic) v ix input 1, 2 v ex input 1, 2 v ddi state 2 v ddo state 2 default low (e0), v ox output 1, 2, 3 default high (e1), v ox output 1, 2, 3 test conditions/comments l h or nc powered powered l l normal operation h h or nc powered powered h h normal operation x l powered powered z z outputs disabled l h or nc unpowered powered l h fail-safe output x 4 l 4 unpowered powered z z outputs disabled x 4 x 4 powered unpowered indeterminate indeterminate 1 l means low, h means high, x means dont care, and nc means not connected, an d z means high impedance. 2 v ix and v ox refer to the input and output signals of a given channel (a, b, c, or d). v ex refers to the output enable signal on the same side as the v ox outputs. v ddi and v ddo refer to the supply voltages on the input and output sides of the given channel, respectively. 3 e0 refers to the adum130e0 / adum131e0 models, d0 refers to the adum130d0 / adum131d0 models, e1 refers to the adum130e1 / adum131e1 models, and d1 refers to the adum130d1 / adum131d1 models. see the ordering guide section. 4 input pins (v ix , v e1 , and v e2 ) on the same side as an unpowered supply must be in a low state to avoid powering the device through its esd protection circui try.
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 15 of 22 pin configurations a nd function descript ions 1 2 3 4 16 15 14 13 5 12 6 1 1 7 10 8 9 nic = no internal connection. leave this pin floating. adum130d t o p view (not to scale) v dd1 gnd 1 v i a v ib v ic nic disable 1 gnd 1 v dd2 gnd 2 v o a v ob v oc nic nic gnd 2 13348-004 figure 7. adum13 0d pin configuration 1 2 3 4 16 15 14 13 5 12 6 1 1 7 10 8 9 nic = no internal connection. leave this pin floating. adum130e t o p view (not to scale) v dd1 gnd 1 v i a v ib v ic nic nic gnd 1 v dd2 gnd 2 v o a v ob v oc nic v e2 gnd 2 13348-005 8 130 table 22 . pin function descriptions pin no. 1 adum130d adum130e mnemonic description 1 1 v dd1 supply voltage for isolator side 1. 2, 8 2, 8 gnd 1 ground 1. ground reference for isolator side 1. 3 3 v ia logic input a. 4 4 v ib logic input b. 5 5 v ic logic input c. 6, 10 , 11 6, 7 , 11 n i c no internal connec tion. leave the s e pin s floating. 7 not applicable disable 1 input disable 1. this pin d isables the isolator inputs. outputs take on the logic state determined by the fail - safe option shown in the ordering guide . 9, 15 9, 15 gnd 2 ground 2. ground reference for isolator side 2. not applicable 10 v e2 output enable 2. active high logic input. w hen v e2 is high or disconnected , the v oa , v ob , and v o c outputs are enable d . w hen v e2 is low , the v oa , v ob , and v o c outputs are disable d to the high - z state. 12 12 v oc logic output c. 13 13 v ob logic output b. 14 14 v oa logic output a. 16 16 v dd2 supply voltage for isolator side 2. 1 reference the an - 1109 application note for specific layout guidelines.
adum130d/adum130 e/adum131d/adum131e data sheet rev. a | page 16 of 22 1 2 3 4 16 15 14 13 5 12 6 1 1 7 10 8 9 nic = no internal connection. leave this pin floating. adum131d t o p view (not to scale) v dd1 gnd 1 v i a v ib v oc nic disable 1 gnd 1 v dd2 gnd 2 v o a v ob v ic disable 2 nic gnd 2 13348-104 figure 9. adum131d pin configuration 1 2 3 4 16 15 14 13 5 12 6 1 1 7 10 8 9 nic = no internal connection. leave this pin floating. adum131e t o p view (not to scale) v dd1 gnd 1 v i a v ib v oc nic v e1 gnd 1 v dd2 gnd 2 v o a v ob v ic nic v e2 gnd 2 13348-105 10 131 table 23 . pin function descriptions pin no. 1 adum131d adum131e mnemonic description 1 1 v dd1 supply voltage for isolator side 1. 2, 8 2, 8 gnd 1 ground 1. ground reference for isolator side 1. 3 3 v ia logic input a. 4 4 v ib logic input b. 5 5 v o c logic out put c. 6 , 11 6 , 11 n i c no internal connec tion. leave this pin floating. 7 not applicable disable 1 input disable 1. this pin d isables the isolator inputs. outputs take on the logic state determined by the fail - safe option shown in the ordering guide . not applicable 7 v e 1 output enable 1 . active high logic input. when v e1 is high or disconnected, the v o c output is enabled. when v e1 is low, the v o c ou tput is disable d to the high - z state . 9, 15 9, 15 gnd 2 ground 2. ground reference for isolator side 2. 10 not applicable disable 2 input disable 2 . this pin d isables the isolator inputs. outputs take on the logic state determined by the fail - safe option shown in the ordering gui de . not applicable 10 v e2 output enable 2. active high logic input. w hen v e2 is high or disconnected , the v oa and v o b outputs are enable d . w hen v e2 is low , the v oa and v o b outputs are disable d to the high - z state. 12 12 v ic logic in put c. 13 13 v ob logic output b. 14 14 v oa logic output a. 16 16 v dd2 supply voltage for isolator side 2. 1 reference the an - 1109 application note fo r specific layout guidelines.
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 17 of 22 typical performance characteristics i dd1 supp l y current (ma) 16 14 12 10 8 6 4 2 0 0 20 40 60 80 dat a r a te (mbps) 100 120 140 160 5.0v 3.3v 2.5v 1.8v 13348- 1 10 figure 11 . adum13 0d / adum130e i dd1 supply current vs. data rate at various voltages 0 2 4 6 8 10 12 14 16 0 20 40 60 80 100 120 140 160 i dd2 supp l y current (ma) dat a r a te (mbps) 5.0v 3.3v 2.5v 1.8v 13348- 11 1 12 13 0 130 2 0 2 4 6 8 10 12 14 16 0 20 40 60 80 100 120 140 160 i dd1 supp l y current (ma) d at a r a te (mbps) 5.0v 3.3v 2.5v 1.8v 13348- 1 12 13 131 131 1 0 2 4 6 8 10 12 14 16 0 20 40 60 80 100 120 140 160 i dd2 supp l y current (ma) d at a r a te (mbps) 5.0v 3.3v 2.5v 1.8v 13348- 1 13 14 131 131 2 0 2 4 6 8 10 12 14 C40 C20 0 20 40 60 80 100 120 140 pro p ag a tion del a y ( t plh ) (ns) temper a ture (c) 5.0v 3.3v 2.5v 1.8v 13348- 1 14 15 0 2 4 6 8 10 12 14 C40 C20 0 20 40 60 80 100 120 140 pro p ag a tion del a y ( t phl ) (ns) temper a ture (c) 5.0v 3.3v 2.5v 1.8v 13348- 1 15 1
adum130d/adum130e/adum131d/adum131e data sheet rev. a | page 18 of 22 applications information overview the a dum130d / adum130e / adum131d / adum131e use a high frequency carrier to transmit data across the isolation barrier using i coupler chip scale transformer coils separated by layers of polyimide isolation . using an on / off keying (ook) technique and the differential architecture shown in figure 18 and figure 19, the adum130d / adum130e / adum131d / adum131e ha ve very low propagation delay and high speed. internal regulators and input/output design techniques allow logic and supply voltages over a wide range from 1.7 v to 5.5 v, offering voltage translation of 1.8 v, 2.5 v, 3.3 v, and 5 v logic. the architecture is designed for high common - mode transient immunity and high immunity to electrical noise and magnetic interference. radiated emissions are mini mized with a spread spectrum ook carrier and other techniques. figure 18 illustrates the waveforms for models of the adum13 0d / adum130e / adum131d / adum131e that have the condition of the fail - safe output state equal to low, where the carrier waveform is off when the input state is low. if the input side is off or not operati ng, the fail - safe output state of low ( the adum130d0 , adum131d0 , adum130e0 , and adum131e0 models ) sets the output to low. for the adum13 0d / adum130e / adum131d / ad um131e that have a fail - safe output state of high, figure 19 illustrates the conditions where the carrier waveform is off when the input state is high. when the input side is off or not operating, the fail - safe output state of high ( the adum130d1 , adum131d1 , adum130e1, and adum131e1 models ) sets the output to high. see the ordering guide for the model numbers that have the fail - safe output state of low or the fail - safe output state of high. printed circuit boar d ( pcb ) layout the adum13 0d / adum130e / adum131d / adum131e digital isolators require no external interface circuitry for the logic interfaces. power supply bypassing is strongly recommended at the input and output supply pins (see figure 17 ). bypass capacitors are most conveniently connected between pin 1 and pin 2 for v dd1 and between pin 15 and pin 16 for v dd2 . the r ecommended bypass capacitor value is between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin must not exceed 10 mm. bypassing between pin 1 and pin 8 and between pin 9 and pin 16 must also be considered, unless the ground pair on each package side is connected close to the package. v dd1 gnd 1 v ia v ib v ic /v oc nic disable 1 /v e1 nic = no internal connection. leave this pin floating. gnd 1 v dd2 gnd 2 v oa v ob v ic /v oc nic disable 2 /v e2 gnd 2 13348-010 f igure 17 . recommended pcb layout in applications involving high common - mode transients, ensure that board coupling across the isolation barrier is minimized. furthermore, design the board layout such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this can cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch - up or permanent damage. see the an- 1109 application note for board layout guidelines. transmitter gnd 1 gnd 2 v in v out receiver regul at or regul at or 13348-014 f ig ure 18 . operational block diagram of a single channel with a low fail - safe output state transmitter gnd 1 gnd 2 v in v out receiver regul at or regul at or 13348-015 1 -
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 19 of 22 propagation delay related parameters propagation delay is a parameter that describes the time it takes a logic signal to propagate through a component. the propagation delay to a logic 0 output may differ from the propagation del ay to a logic 1 output. input (v ix ) output (v ox ) t plh t ph l 50% 50% 13348-0 1 1 figure 20 . propagation delay parameters pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the timing of the input signal is preserved. channel matching is the maximum amount the propagation delay differs between channels within a single adum13 0d / adum130e / adum1 31d / adum131e component. propagation delay skew is the maximum amount the propagation delay differs between multiple adum130d / adum130e / adum131d / adum131e components operating un der the same conditions . jitter measurement figure 21 shows the eye diagram for the adum130d / adum130e / adum131d / adum131e . the measurement was taken using an agilent 81110a pulse pattern generator at 150 mbps with pseudo - random bit sequence s (prbs) , 2(n ? 1), n = 14, for 5 v supplies. jitter was measured with the tektronix model 5104b oscilloscope, at 1 ghz, 10 gs ps with the dpojet jitter and eye diagram analysis tools. the result shows a typical measureme nt on the adum13 0d / adum130e / adum131d / adu m131e with 6 3 0 ps p - p jitter. 10 5 0 1 2 3 4 volt age (v) 5 0 time (ns) C5 C10 13348-012 figure 21 . eye diagram insulation lifetime all insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation as well as on the materials and material interfaces. the two types of insulation degradation of primary interest are breakdown along surfaces exposed to the air and insulation wear out. surface breakdown is the phenomenon of surface tracking and the primary determinant of surface creepage requirements in system level standards. insulation wear out is the phenomenon where charge injection or displacement cu rrents inside the insulation material cause long - term insulation degradation. surface tracking surface tracking is addressed in electrical safety standards by setting a minimum surface creepage based on the working voltage , the environmental conditions, a nd the properties of the insulation material. safety agencies perform characterization testing on the surface insulation of components that allows the components to be categorized in different material groups. lower material group ratings are more resistan t to surface tracking and, therefore, can provide adequate lifetime with smaller creepage. the minimum creepage for a given working voltage and material group is in each system level standard and is based on the total rms voltage across the isolation, poll ution degree, and material group. the material group and creepage for the adum130d / adum130e / adum131d / adum131e isolators are presented in ta ble 9 . i nsulation wear o ut the lifetime of insulation caused by wear out is determined by its thickness, material properties, and the voltage stress applied. it is important to verify that the product lifetime is adequate at the application working voltage. the working voltage su pported by an isolator for wear out may not b e the same as the working voltage supported for tracking. it is the working voltage applicable to tracking that is specified in most standards. testing and modeling have shown that the primary driver of long - term degradation is displacement current in the polyimide insulation causing incremental damage. the stress on the insula - tion can be broken down into broad categories, such as dc stress, which causes very little wear out because there is no displacement current, and an ac component time varying voltage stress, which causes wear out.
adum130d/adum130 e/adum131d/adum131e data sheet rev. a | page 20 of 22 the ratings in certification documents are usually based on 60 hz sinusoidal stress because this reflects isolation from line voltage. however, many practical applications have combinations of 60 hz ac and dc across the ba rrier as shown in equation 1. because only the ac portion of the stress causes wear out, the equation can be rearranged to solve for the ac rms voltage, as shown in equation 2. for insulation wear out with the polyimide materials used in these products, th e ac rms voltage determines the product lifetime. 2 2 dc rms ac rms v v v + = dc rms rms ac v v v ? = v ac rms is the time varying portion of the working voltage. v rms is the total rms working voltage. v dc is the dc offset of the working voltage. calculation and use of parameters example the following example frequently arises in power conversion applications. assume that the line voltage on one side of the isolation is 240 v ac rms and a 400 v dc bus volta ge is present on the other side of the isolation barrier. the isolator material is polyimide. to establish the critical voltages in determining the creepage, clearance , and lifetime of a device, see figure 22 and the following equations. the working voltage across the barrier from equation 1 is 2 2 dc rms ac rms v v v + = + = rms v v rms = 466 v this v rms value is the working voltage used together with the material group and pollution degree when looking up the creepage required by a system standard. to determine if the lifetime is adequate, obtain the time varying portion of the working voltage. to obtain the ac rms voltage, use equation 2 . 2 2 dc rms rms ac v v v ? = ? = rms ac v v ac rms = 240 v rms in this case, the ac rms voltage is simply the line voltage of 240 v rms. this calculation is more relevant when the waveform is not sinusoidal. the value is compared to the limits for wo rking voltage in table 19 for the expected lifetime, less than a 60 hz sin e wave, and it is well within the limit for a 50 - year service life. note that the dc working voltage limit in table 19 is set by the creepage of the package as specified in iec 60664 - 1. this value can differ for specific system level standards. isol a tion vo lt age time v ac rms v rms v dc v peak 13348-013 figure 22 . critical voltage example
data sheet adum130d/adum130e/adum131d/adum131e rev. a | page 21 of 22 outline dimensions controlling dimensions are in millimeters; inch dimensions (in p arentheses) are rounded-off millimeter equi v alents for reference on l y and are not appropri a te for use in design. compliant t o jedec s t andards ms-012-ac 10.00 (0.3937) 9.80 (0.3858) 16 9 8 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 1.27 (0.0500) bsc sea ting plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarit y 0.10 8 0 060606- a 45 figure 23 . 16 - lead standard small outline package [soic_ n ] narrow body (r - 16) dimensions shown in millimeters and (inches) c o n t r o l l i n g d i m e n s i o n s a r e i n m i l l i m e t e r s ; i n c h d i m e n s i o n s ( i n p a r e n t h e s e s ) a r e r o u n d e d - o f f m i l l i m e t e r e q u i v a l e n t s f o r r e f e r e n c e o n l y a n d a r e n o t a p p r o p r i a t e f o r u s e i n d e s i g n . c o m p l i a n t t o j e d e c s t a n d a r d s m s - 0 1 3 - a a 1 0 . 5 0 ( 0 . 4 1 3 4 ) 1 0 . 1 0 ( 0 . 3 9 7 6 ) 0 . 3 0 ( 0 . 0 1 1 8 ) 0 . 1 0 ( 0 . 0 0 3 9 ) 2 . 6 5 ( 0 . 1 0 4 3 ) 2 . 3 5 ( 0 . 0 9 2 5 ) 1 0 . 6 5 ( 0 . 4 1 9 3 ) 1 0 . 0 0 ( 0 . 3 9 3 7 ) 7 . 6 0 ( 0 . 2 9 9 2 ) 7 . 4 0 ( 0 . 2 9 1 3 ) 0 . 7 5 ( 0 . 0 2 9 5 ) 0 . 2 5 ( 0 . 0 0 9 8 ) 4 5 1 . 2 7 ( 0 . 0 5 0 0 ) 0 . 4 0 ( 0 . 0 1 5 7 ) c o p l a n a r i t y 0 . 1 0 0 . 3 3 ( 0 . 0 1 3 0 ) 0 . 2 0 ( 0 . 0 0 7 9 ) 0 . 5 1 ( 0 . 0 2 0 1 ) 0 . 3 1 ( 0 . 0 1 2 2 ) s e a t i n g p l a n e 8 0 1 6 9 8 1 1 . 2 7 ( 0 . 0 5 0 0 ) b s c 0 3 - 2 7 - 2 0 0 7 - b figure 24 . 16 - lead standard small outline package [soic_w] wide body (rw - 16) dimensions shown in millimeters and (inches)
adum130d/adum130e/ad um131d/adum131e data sheet rev. a | page 22 of 22 ordering guide model 1 temperature range no. of inputs, v dd1 side no. of inputs, v dd2 side withstand voltage rating (kv rms) fail-safe output state input disable output enable package description package option adum130d1brz ?40c to +125c 3 0 3.0 high yes no 16-lead soic_n r-16 adum130d1brz-rl7 ?40c to +125c 3 0 3.0 high yes no 16-lead soic_n r-16 adum130d0brz ?40c to +125c 3 0 3.0 low yes no 16-lead soic_n r-16 adum130d0brz-rl7 ?40c to +125c 3 0 3.0 low yes no 16-lead soic_n r-16 adum130e1brz ?40c to +125c 3 0 3.0 high no yes 16-lead soic_n r-16 adum130e1brz-rl7 ?40c to +125c 3 0 3.0 high no yes 16-lead soic_n r-16 adum130e0brz ?40c to +125c 3 0 3.0 low no yes 16-lead soic_n r-16 adum130e0brz-rl7 ?40c to +125c 3 0 3.0 low no yes 16-lead soic_n r-16 adum130d1brwz ?40c to +125c 3 0 3.75 high yes no 16-lead soic_w rw-16 adum130d1brwz-rl ?40c to +125c 3 0 3.75 high yes no 16-lead soic_w rw-16 adum130d0brwz ?40c to +125c 3 0 3.75 low yes no 16-lead soic_w rw-16 adum130d0brwz-rl ?40c to +125c 3 0 3.75 low yes no 16-lead soic_w rw-16 adum130e1brwz ?40c to +125c 3 0 3.75 high no yes 16-lead soic_w rw-16 adum130e1brwz-rl ?40c to +125c 3 0 3.75 high no yes 16-lead soic_w rw-16 adum130e0brwz ?40c to +125c 3 0 3.75 low no yes 16-lead soic_w rw-16 ADUM130E0BRWZ-RL ?40c to +125c 3 0 3.75 low no yes 16-lead soic_w rw-16 adum131d1brz ?40c to +125c 2 1 3.0 high yes no 16-lead soic_n r-16 adum131d1brz-rl7 ?40c to +125c 2 1 3.0 high yes no 16-lead soic_n r-16 adum131d0brz ?40c to +125c 2 1 3.0 low yes no 16-lead soic_n r-16 adum131d0brz-rl7 ?40c to +125c 2 1 3.0 low yes no 16-lead soic_n r-16 adum131e1brz ?40c to +125c 2 1 3.0 high no yes 16-lead soic_n r-16 adum131e1brz-rl7 ?40c to +125c 2 1 3.0 high no yes 16-lead soic_n r-16 adum131e0brz ?40c to +125c 2 1 3.0 low no yes 16-lead soic_n r-16 adum131e0brz-rl7 ?40c to +125c 2 1 3.0 low no yes 16-lead soic_n r-16 adum131d1brwz ?40c to +125c 2 1 3.75 high yes no 16-lead soic_w rw-16 adum131d1brwz-rl ?40c to +125c 2 1 3.75 high yes no 16-lead soic_w rw-16 adum131d0brwz ?40c to +125c 2 1 3.75 low yes no 16-lead soic_w rw-16 adum131d0brwz-rl ?40c to +125c 2 1 3.75 low yes no 16-lead soic_w rw-16 adum131e1brwz ?40c to +125c 2 1 3.75 high no yes 16-lead soic_w rw-16 adum131e1brwz-rl ?40c to +125c 2 1 3.75 high no yes 16-lead soic_w rw-16 adum131e0brwz ?40c to +125c 2 1 3.75 low no yes 16-lead soic_w rw-16 adum131e0brwz-rl ?40c to +125c 2 1 3.75 low no yes 16-lead soic_w rw-16 1 z = rohs compliant part. ?2015 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d13348-0-11/15(a)

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